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HUSTIR > College of Engineering > Department of Electrical Engineering & Graduate Institute > Monograph > Item 310993100/3297

Please use this identifier to cite or link to this item: http://ir.hust.edu.tw/dspace/handle/310993100/3297

Title:	5T靜態隨機存取記憶體(III)
Authors:	陳煥喬;張芳逢
Contributors:	電機工程系
Keywords:	單埠 SARM 靜態隨機記憶體 HSPICE
Date:	2012-12-12
Issue Date:	2013-07-23T06:03:33Z
Abstract:	本專題所提出之單埠隨機存取記憶體之SRAM，其經使用TSMC 0.18微米CMOS製程參數加以模擬，證實其不但可有效避免寫入邏輯1困難之問題，並能有效降低待機功率，且具良好的靜態雜訊邊際（SNM），再者，即使將電源供應電壓下降至1.0V特，並使用TSMC 0.18微米CMOS製程參數加以模擬，仍能具有良好的性能。
Appears in Collections:	[Department of Electrical Engineering & Graduate Institute] Monograph

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